Methods for reducing the effects of power supply distribution re

Static information storage and retrieval – Read/write circuit – Noise suppression

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365226, G11C 702

Patent

active

061118044

ABSTRACT:
A method is provided for reducing the effects of power supply distribution related noise in an integrated circuit, the integrated circuit having a power supply bus, a ground bus, a DRAM-technology capacitor, and a load circuit. The method includes forming the DRAM-technology capacitor adjacent the load circuit, and connecting the DRAM-technology capacitor directly between the supply voltage bus and the ground voltage bus.

REFERENCES:
patent: 5455192 (1995-10-01), Jeon
patent: 5801412 (1998-09-01), Tobita
patent: 5838038 (1998-11-01), Takashima et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for reducing the effects of power supply distribution re does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for reducing the effects of power supply distribution re, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for reducing the effects of power supply distribution re will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1255723

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.