Integrated circuit memory devices having main and section row de
Integrated circuit memory devices providing per-bit...
Integrated circuit memory devices that map nondefective memory c
Integrated circuit memory devices with improved layout of fuse b
Integrated circuit memory devices with per-bit redundancy...
Integrated circuit memory having a fuse detect circuit and metho
Integrated circuit memory having column redundancy
Integrated circuit memory having column redundancy with no...
Integrated circuit memory with column redundancy having shared r
Integrated circuit memory with multiplexed redundant column data
Integrated circuit with built-in indicator of internal repair
Integrated circuitry for checking the utilization rate of redund
Integrated circuits and methods to compensate for defective...
Integrated dynamic memory and method for operating it
Integrated dynamic semiconductor memory having redundant...
Integrated dynamic write-read memory with a decoder blocking the
Integrated electrical module with regular and redundant...
Integrated matrix of nonvolatile, reprogrammable storage cells
Integrated memory and method for testing and repairing the...
Integrated memory circuit and method for repairing a single...