Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1983-01-28
1988-06-07
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365230, G11C 700
Patent
active
047501588
ABSTRACT:
In an integrated matrix of nonvolatile, reprogrammable storage cells, additional memory is provided to replace defective rows of storage cells. The addresses of the defective rows are stored in a region of the matrix. A correction register can be loaded with the addresses of the defective rows from the region of the matrix when power is first applied to the matrix or whenever the applied power deviates from the expected, nominal value.
REFERENCES:
patent: 4047163 (1977-09-01), Choate et al.
patent: 4428068 (1984-01-01), Baba
Fischer Thomas
Giebel Burkhard
IT&T Industries, Inc.
Peterson T. L.
Popek Joseph A.
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