Semiconductor memory device having dummy bit and word lines

Semiconductor memory device having folded bit line array and an

Semiconductor memory device having hierarchical bit line arrange

Semiconductor memory device having hierarchical bit line structu

Semiconductor memory device having improved bit line distributio

Semiconductor memory device having improved bit line structure

Semiconductor memory device having improved cell array layout

Semiconductor memory device having improved voltage...

Semiconductor memory device having improved voltage...

Semiconductor memory device having improved wiring architecture

Semiconductor memory device having low noise bit line structure

Semiconductor memory device having memory cell matrix obliquely

Semiconductor memory device having multibit data bus and redunda

Semiconductor memory device having netlike power supply lines

Semiconductor memory device having reduced interconnection...

Semiconductor memory device having repeaters located at the...

Semiconductor memory device having row decoder in which...

Semiconductor memory device having selectively shielded data...

Semiconductor memory device having sense and data lines for...

Semiconductor memory device having transfer gates coupled betwee