Large-scale integrated circuit device such as a wafer scale memo
Layout for a semiconductor memory device having a triple well st
Layout for semiconductor memory including multi-level sensing
Layout of a sense amplifier with accelerated signal evaluation
Layout structure of bit line sense amplifier of...
Layout structures and methods of fabricating layout structures
Layout structures in semiconductor memory devices including...
Layout structures in semiconductor memory devices including...
Layout techniques for memory circuitry
Layout techniques for memory circuitry
Line drivers that fits within a specified line pitch
Line layout structure of semiconductor memory devices
Liquid crystal display device having redundant pairs of address
Loading data plane on reconfigurable chip
Local digit line architecture and method for memory devices...
Local digit line architecture and method for memory devices...
Local sense amplifier in memory device
Logic and memory device integration
Logic process DRAM
Logic process DRAM