Semiconductor memory device having transfer gates coupled betwee

Details Semiconductor memory device having transfer gates coupled betwee Semiconductor memory device having transfer gates coupled betwee

1989-11-29

1991-01-08

Moffitt, James W.

Static information storage and retrieval

Interconnection arrangements

365190, 357 45, G11C 506

Patent

active

049841971

ABSTRACT:
A semiconductor memory device of the type having a pair of transfer gates between a bit line pair and an interconnection pair coupled to a sense amplifier circuit operates at a high speed because of the reduction of parasitic capacitances coupled to the sense amplifier circuit, however, the sense amplifier circuit is so sensitive to an electrical unbalance between the input nodes thereof that a transfer signal line is coupled to the gate electrodes of the transfer gates through a contact window located in such a manner that coupling capacitances between the transfer signal line and the interconnections do not provide the electrical unbalance, then the contact window is by way of example located between the interconnections.

REFERENCES:
patent: 4689770 (1987-08-01), Miyamoto et al.

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