Semiconductor memory device having improved bit line structure

Static information storage and retrieval – Interconnection arrangements

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365149, G11C 506

Patent

active

059739533

ABSTRACT:
A semiconductor memory device is constituted such that, when a first wiring layer provides a bit line of a first common complementary data line pair and a third wiring layer provides a bit line of a second common complementary data line pair, a second wiring layer makes an overlapped area between the bit line and the bit bar line of the second common complementary dada line pair equal to the bit line of the first common complementary data line pair and also an overlapped area between the bit line and the bit bar line of the first common complementary data line pair equal to the bit line of the second common complementary data line pair.

REFERENCES:
patent: 5416734 (1995-05-01), Hidaka et al.

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