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Data pass control device for masking write ringing in DDR...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Data path reset circuit using clock enable signal, reset...

Static information storage and retrieval – Addressing – Sync/clocking
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Data processing system with extended memory access

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Data processing system, method, and product for...

Static information storage and retrieval – Addressing – Sync/clocking
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Data signal distribution circuit for synchronous memory device

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Data storage device capable of storing plural bits of data

Static information storage and retrieval – Addressing – Sync/clocking
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Data strobe buffer in SDRAM

Static information storage and retrieval – Addressing – Sync/clocking
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Data strobe signal generating device and a semiconductor...

Static information storage and retrieval – Addressing – Sync/clocking
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Data synchronization arrangement

Static information storage and retrieval – Addressing – Sync/clocking
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Data writing method for semiconductor memory device

Static information storage and retrieval – Addressing – Sync/clocking
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DDR memory and storage method

Static information storage and retrieval – Addressing – Sync/clocking
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Decoder

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Deep pipe synchronous SRAM

Static information storage and retrieval – Addressing – Sync/clocking
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Delay line and output clock generator using same

Static information storage and retrieval – Addressing – Sync/clocking
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Delay lock loop circuit useful in a synchronous system and...

Static information storage and retrieval – Addressing – Sync/clocking
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Delay lock loop circuit useful in a synchronous system and...

Static information storage and retrieval – Addressing – Sync/clocking
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Delay locked loop (DLL) in semiconductor device

Static information storage and retrieval – Addressing – Sync/clocking
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Delay locked loop control circuit

Static information storage and retrieval – Addressing – Sync/clocking
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Delay locked loop device

Static information storage and retrieval – Addressing – Sync/clocking
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Delay locked loop for use in synchronous dynamic random...

Static information storage and retrieval – Addressing – Sync/clocking
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