Decoder

Details Decoder Decoder

1979-07-31

1981-01-27

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365189, 307238, G11C 700, G11C 1140

Patent

active

042479215

ABSTRACT:
A decoder for decoding address signals and a clock signal, in a synchronous CMOS memory, comprising an MOS transistor of one conductivity-type, to whose gate is applied a clock-including address signal, and a plurality of MOS transistors of the opposite conductivity-type connected in series, to each gate of which is applied the address signal and the clock-including address signal, respectively, whereby a terminal connecting the MOS transistor of one conductivity-type and the MOS transistors of the opposite conductivity-type serves as an output.

REFERENCES:
patent: 4110842 (1978-08-01), Sarkissian

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