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Capacitor structures, DRAM cell structures, and integrated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor structures, DRAM cell structures, and integrated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor structures, DRAM cell structures, methods of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor that includes high permittivity capacitor dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor under bitline (CUB) memory cell structure with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor using high dielectric constant film for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with hafnium oxide and aluminum oxide alloyed...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with high dielectric constant materials and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with high dielectric constant materials and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with high-&egr; dielectric or ferroelectric...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with pillar type storage node and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with stoichiometrically adjusted dielectric and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with stoichiometrically adjusted dielectric and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor with zirconium oxide and method for fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor/antifuse structure having a barrier-layer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitor/antifuse structure having a barrier-layer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitorless 1-transistor DRAM cell and fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitorless 1-transistor DRAM cell and fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Capacitorless DRAM on bulk silicon

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Capacitors and capacitor forming methods

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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