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Vertical dual gate field effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical field effect transistor with metal oxide as...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical field-effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical flash memory cell with buried source rail

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical floating gate transistor with epitaxial channel

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical gain cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical gain cell and array for a dynamic random access...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical gate CMOS with lithography-independent gate length

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical gated access transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical gated access transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical internally-connected trench cell (V-ICTC) and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical memory cell and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical memory device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical MOS transistor and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical MOS transistor and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical MOS transistor device with asymmetrical source and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Vertical MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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