Vertical MOS transistor and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C257S060000, C257S135000, C257S263000, C257S330000

Reexamination Certificate

active

08048740

ABSTRACT:
In one embodiment, a vertical MOS transistor is formed without a thick field oxide and particularly without a thick field oxide in the termination region of the transistor.

REFERENCES:
patent: 4786960 (1988-11-01), Jeuch
patent: 5422844 (1995-06-01), Wolstenholme et al.
patent: 5512504 (1996-04-01), Wolstenholme et al.
patent: 5614744 (1997-03-01), Merrill
patent: 5614751 (1997-03-01), Yilmaz et al.
patent: 7087958 (2006-08-01), Chuang et al.
patent: 7453119 (2008-11-01), Bhalla et al.
patent: 7683453 (2010-03-01), Williams et al.
patent: 2005/0205897 (2005-09-01), Depetro et al.
patent: 2007/0090470 (2007-04-01), Heringa

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