Vertical memory device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S238000, C438S381000, C257SE21170, C257SE21229, C257SE21304, C257SE21278, C257SE21293, C257SE21646

Reexamination Certificate

active

07615428

ABSTRACT:
Method and apparatus are described for a memory cell includes a substrate, a body extending vertically from the substrate, a first gate having a vertical member and a horizontal member and a second gate comprising a vertical member and a horizontal member. The first gate is disposed laterally from the body and the second gate is disposed laterally from the first gate. The horizontal member of the first gate overlaps the horizontal member of the second gate.

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patent: 2004/0245562 (2004-12-01), Hsiao et al.

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