Vertical gate CMOS with lithography-independent gate length

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S204000

Reexamination Certificate

active

06846709

ABSTRACT:
Formation of elements of a vertical transistor is described, particularly, a gate-source-drain arrangement of a CMOS transistor. Vertical transistors are used frequently in the integrated circuit art. Accordingly, improved methods for their formation, which are not limited by constraints of photolithography, have great utility and importance. Those of skill in the art will appreciate that the techniques described may be used to fabricate other types of devices as well. For example, junctions of a bipolar transistor (as well as other device junction types) may be fabricated using the methods described herein.

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patent: 6413802 (2002-07-01), Hu et al.
patent: 6525403 (2003-02-01), Inaba et al.
patent: 20020060338 (2002-05-01), Zhang
J.M. Hergenrother et al., (Bell Laboratories, Lucent Technologies), Murray Hill, NJ. The Vertical Replacement-Gate (VRG) MOSFET: A 50-nm Vertical MOSFET with Lithography-Independent Gate Length; IEEE 1999 Internationl Electron Devices Meeting, pp. 3.6.1.—3.6.4.
D.Monroe et al., (Lucent Technologies, Bell Labs Innovations), “Revolutionary Transistor Turns Silicon World on End”, Apr. 2000, Lucent Technologies, 3 pages.

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