LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical MOSFET with asymmetric gate structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical nano-size transistor using carbon nanotubes and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical nano-size transistor using carbon nanotubes and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical nitride read-only memory cell and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical NPN transistor for 0.35 micrometer node CMOS logic tech

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical NROM NAND flash memory array

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical PNP transistor and method of making same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical replacement-gate junction field-effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical semiconductor device and method of manufacturing the sa

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical semiconductor devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical sidewall profile spacer layer and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical source/drain contact semiconductor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical split gate flash memory cell and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical transistor and method of making

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical transistor and method of manufacturing thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical transistor interconnect structure and fabrication metho

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical transistor with horizontal gate layers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical transistor with horizontal gate layers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Vertical trench-formed dual-gate FET device structure and...