Vertical PNP transistor and method of making same

Details Vertical PNP transistor and method of making same Vertical PNP transistor and method of making same

2011-07-05

2011-07-05

Gebremariam, Samuel A (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S203000, C438S969000, C438S417000, C438S322000

Reexamination Certificate

active

07972919

ABSTRACT:
The present invention relates to a device structure located in a semiconductor substrate and containing high performance vertical NPN and PNP transistors. Specifically, the vertical PNP transistor has an emitter region, and the vertical NPN transistor has an intrinsic base region. The emitter region of the vertical PNP transistor and the intrinsic base region of the vertical NPN transistor are located in a single silicon germanium-containing layer, and they both contain single crystal silicon germanium. The present invention also relates to a method for fabricating such a device structure based on collateral modification of conventional fabrication processes for CMOS and bipolar devices, with few or no additional processing steps.

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