Vertical nano-size transistor using carbon nanotubes and...

Details Vertical nano-size transistor using carbon nanotubes and... Vertical nano-size transistor using carbon nanotubes and...

2005-02-15

2005-02-15

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S156000, C438S173000, C438S192000, C438S206000, C438S212000, C438S270000, C257S135000, C257S302000

Reexamination Certificate

active

06855603

ABSTRACT:
The present invention provide a vertical nano-sized transistor using carbon nanotubes capable of achieving high-density integration, that is, tera-bit scale integration, and a manufacturing method thereof, wherein in the vertical nano-sized transistor using carbon nanotubes, holes having diameters of several nanometers are formed in an insulating layer and are spaced at intervals of several nanometers. Carbon nanotubes are vertically aligned in the nano-sized holes by chemical vapor deposition, electrophoresis or mechanical compression to be used as channels. A gate is formed in the vicinity of the carbon nanotubes using an ordinary semiconductor manufacturing method, and then a source and a drain are formed at lower and upper parts of each of the carbon nanotubes thereby fabricating the vertical nano-sized transistor having an electrically switching characteristic.

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