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Integrated circuit having a self-test device and method for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Integrated circuit having a self-test device for carrying...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Integrated circuit having a subordinate test interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit having a test cell that resynchronizes...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit having distributed control and status...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit having electrically isolatable test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit having electrically isolatable test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit having memory array including ECC and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Integrated circuit having memory built-in self test (BIST) for d

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Integrated circuit having multiple modes of operation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Integrated circuit having multiple modes of operation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Integrated circuit implementing internally generated commands

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Integrated circuit in a maximum input/output configuration

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Integrated circuit including a test signal generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Integrated circuit including duplicated synchronous and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
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Integrated circuit including patching circuitry to bypass portio

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Integrated circuit internal signal monitoring apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Integrated circuit memory devices and methods for generating...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Integrated circuit memory devices having error checking and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Integrated circuit memory devices including internal stress...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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