Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-11-25
2000-12-05
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 54, B06F 1100
Patent
active
06158018&
ABSTRACT:
An improved Integrated Circuit (IC) device is delineated comprising, in combination, an IC including an embedded Digital Signal Processor (DSP), an embedded Random Access Memory (RAM), an embedded Read Only Memory (ROM) having at least one portion thereof which is flawed and embedded patching circuitry having as inputs the current DSP program address and at least one break address wherein each break address corresponds to a separate flawed portion of the embedded ROM. The patching circuitry supplies data stored in flawless portions of the ROM to the DSP until the current DSP program address matches a break address indicating that the next portion of the embedded ROM is flawed. In place of the data stored in the flawed portion of the embedded ROM, the patching circuitry supplies corrected data stored in the embedded RAM to the DSP, and after this corrected data is supplied, data transfer to the DSP from the remaining unflawed portions of the embedded ROM is resumed. If flawed portions in the embedded ROM are subsequently detected, the aforementioned process repeats.
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Bernasconi Eric
Harnay Didier
Baderman Scott T.
Beausoliel, Jr. Robert W.
Philips Semiconductor Inc.
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