Integrated circuit in a maximum input/output configuration

Details Integrated circuit in a maximum input/output configuration Integrated circuit in a maximum input/output configuration

2007-12-04

2007-12-04

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S763000

Reexamination Certificate

active

10303179

ABSTRACT:
A memory includes input/output paths and electrical leads. Each of the input/output paths are coupled to separate electrical leads. The memory is configured to operate in a test architecture and an operating architecture. In the test architecture, logic enables a greatest number of input/output paths. In the operating architecture, the memory enables the same or fewer input/output paths. The method of selecting a configuration includes establishing an operating and a test architecture and testing the memory in its greater input/output configuration.

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