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Circuit for efficiently testing memory and shadow logic of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Circuit for evaluating signal timing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Circuit for generating a cyclic code

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Circuit for inspecting a data error

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit for measuring signal delays of asynchronous inputs...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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Circuit for measuring signal delays of asynchronous inputs...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
Reexamination Certificate

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Circuit for modifying stored data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Circuit for monitoring information on an interconnect

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Circuit for PLL-based at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit for PLL-based at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit for processing trace information

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Circuit for reducing test time and semiconductor memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit for storing trace information

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Circuit for testing power down reset function of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit for testing power down reset function of an...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit including a built-in self-test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit scan output arrangement

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Circuit state scan-chain, data collection system and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit structure for testing microprocessors and test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit test pattern edition apparatus, circuit test pattern...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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