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Technique for programming clocks in automatic test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique for reducing parity bit-widths for check bit and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Technique for sharing parity over multiple single-error...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Technique to decrease the exposure time of infrared imaging...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique to detect drive strength of input pin

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Technique to test an integrated circuit using fewer pins

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for automatic eye-degradation testing of a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for capturing signals at output pins in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for capturing signals at output pins in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for decoding information from signals received...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for detecting and correcting errors in a memory...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for detecting and correcting errors using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for enhanced reliability of data transfer with...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for entering a low-power link state

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for generating bit reliability information in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for generating bit reliability information in the...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for generating cyclic redundancy check (CRC) values

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Techniques for logic built-in self-test diagnostics of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for mitigating, detecting and correcting single...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Techniques for mitigating, detecting, and correcting single...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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