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Event tester architecture for mixed signal testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Exception handling in content based routing solutions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Expectation based event verification

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Exploitive test pattern apparatus and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Extended convolutional codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extended ECC system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extended error correction codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extended error correction for SEC-DED codes with package...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extended symbol Galois field error correcting device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extender card for testing error-correction-code (ECC)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Extender card with intercepting EEPROM for testing and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Extending test sequences to accepting states

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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External scan circuitry connected to leads extending from...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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External storage device and memory access control method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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External storage device and memory access control method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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External storage device and memory access control method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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External trigger delay compensation apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Externally-loaded weighted random test pattern compression

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Extracting soft information in a block-coherent...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Eye width characterization mechanism

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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