Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-09-18
2007-09-18
Kerveros, James C. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S052000
Reexamination Certificate
active
10709156
ABSTRACT:
Memory modules with an extra dynamic-random-access memory (DRAM) chip for storing error-correction code (ECC) are tested on a personal computer (PC) motherboard tester using a cross-over extender card inserted into a memory module socket on the motherboard. ECC code generated on the motherboard is normally stored in the extra ECC DRAM chip, preventing test patterns such as checkerboards and walking-ones to be written directly to the ECC DRAM chip. During testing, the cross-over extender card routes signals from the motherboard for one of the data DRAM chips to the ECC DRAM chip, while the ECC code is routed to one of the data DRAM chips. The checkerboard or other test pattern is thus written and read from the ECC DRAM chip that normally stores the ECC code. The cross-over extender card can be hardwired, or can have a switch to allow normal operation or testing of the ECC DRAM chip.
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Co Ramon S.
Lai Tat Leung
Sun David
Auvinen Stuart T.
gPatent LLC
Kerveros James C.
Kingston Technology Corp.
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