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Circuit to reduce rail noise voltage spikes due to switching...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Circuit with expected data memory coupled to serial input lead

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuit, semiconductor device and method for enhancing test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit, system and method for arranging data output by...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuit, system and method for arranging data output by...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuitry for and system and substrate with circuitry for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuitry for handling high impedance busses in a scan...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuitry to prevent peak power problems during scan shift

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuitry with multiplexed dedicated and shared scan path cells

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuitry, apparatus and method for embedding a test status...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuits and associated methods for improved debug and test...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuits and methods for measuring signal propagation delays...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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Circuits and methods for repairing defects in memory devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Circuits and methods for repairing defects in memory devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Circuits and methods for repairing defects in memory devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Circuits and methods for testing logic devices by modulating...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuits and methods for testing programmable logic devices...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Circuits, architectures, apparatuses, systems, methods,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Clock adjusting method and circuit device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Clock adjusting method and circuit device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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