Circuit to reduce rail noise voltage spikes due to switching...
Circuit with expected data memory coupled to serial input lead
Circuit, semiconductor device and method for enhancing test...
Circuit, system and method for arranging data output by...
Circuit, system and method for arranging data output by...
Circuitry for and system and substrate with circuitry for...
Circuitry for handling high impedance busses in a scan...
Circuitry to prevent peak power problems during scan shift
Circuitry with multiplexed dedicated and shared scan path cells
Circuitry, apparatus and method for embedding a test status...
Circuits and associated methods for improved debug and test...
Circuits and methods for measuring signal propagation delays...
Circuits and methods for repairing defects in memory devices
Circuits and methods for repairing defects in memory devices
Circuits and methods for repairing defects in memory devices
Circuits and methods for testing logic devices by modulating...
Circuits and methods for testing programmable logic devices...
Circuits, architectures, apparatuses, systems, methods,...
Clock adjusting method and circuit device
Clock adjusting method and circuit device