Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-08-23
2009-11-10
Tu, Christine T (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S819000, C710S260000
Reexamination Certificate
active
07617428
ABSTRACT:
Circuits and associated methods for testing internal operation of an application integrated circuit. Features and aspects hereof add configurable test interrupt circuits to an application circuit design to permit dynamic, configurable interrupt generation from an integrated circuit based on conditions determined from monitoring of internal signals of the application circuit. The internal signals that may be tested and used to generate test interrupts are those not exposed to the external processor interface of the integrated circuit and thus may be configured to interrupt based on any internal state of the application specific functional circuits of the integrated circuit.
REFERENCES:
patent: 5421027 (1995-05-01), Benzel et al.
patent: 5987556 (1999-11-01), Nakagawa et al.
patent: 7340575 (2008-03-01), Barret et al.
patent: 2006/0206646 (2006-09-01), Shrivastava et al.
Besmer Brad D.
Kendall Guy W.
Smith Paul J.
Duft Bornsen & Fishman LLP
LSI Corporation
Tu Christine T
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