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Coding system and decoding system using an input code string

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Coding system and decoding system using an input code string

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Coding system having state machine based interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Coding system having state machine based interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Coding-decoding device and method for conversion of binary...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Coding/decoding apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combinational circuit, and encoder, decoder and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combinational test pattern generation method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinational test pattern generation method and apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinatorial at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combinatorial at-speed scan testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Combined command and data code

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combined cyclic redundancy check (CRC) and Reed-Solomon (RS)...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combined DC restoration double detection and loops

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combined encoder/syndrome generator with reduced delay

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combined error position circuit and chien search circuit for ree

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Combined hybrid automatic retransmission request scheme

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Combined logic and memory circuit with built-in memory test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Combined processor access and built in self test in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Combined single error correction/device kill detection code

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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