Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2000-02-29
2001-11-27
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S083000
Reexamination Certificate
active
06323674
ABSTRACT:
BACKGROUND
The invention relates to a technique and apparatus for terminating a transmission line.
A matching impedance typically used to properly terminate a transmission line for purposes of transmitting high frequency signals over the line. As an example, a conductive circuit board trace is one such transmission line that may communicate a high frequency signal and thus, may need to be coupled to a matching impedance. Otherwise, without the matching impedance, the signal may be reflected at points along the trace where impedance mismatches are present.
For example, the conductive trace may form a data line of a memory bus of a computer system. Without proper termination of the conductive trace, excessive ringing and other types of distortion may severely affect the integrity of the signal leading to the erroneous indication of data by the signal. Furthermore, without proper termination, the signal may have substantial harmonic components, components that may cause excessive ringing in the signal and may cause the radiation of an excessive amount of electromagnetic interference (EMI) from the conductive trace.
There are several conventional techniques that may be used to terminate a transmission line. As an example,
FIG. 1
depicts a parallel matching technique that may be used to terminate a transmission line
8
. In this arrangement, a source
5
generates a signal that propagates across the transmission line
8
to a receiver
6
that may be represented from a loading perspective by a capacitor
9
, for example. The source
5
is not ideal, but rather, the source
5
may be viewed as including an ideal signal generator
4
and having a nonideal resistance that is represented by a resistor
10
that is coupled in series with the signal generator
4
. The source
5
may also have an inherent capacitance that is represented by a capacitor
11
that is coupled in between the output terminal of the source
5
and ground. To terminate the transmission line
8
, the parallel matching technique teaches coupling a resistor
7
in parallel with the receiver
6
.
Another transmission line termination technique is a source matching technique that is depicted in FIG.
2
. In this technique, a resistor
16
is coupled between the source
5
and the transmission line
8
to terminate the transmission line
8
. As shown, no matching impedance is coupled to the other end of the transmission line
8
.
Unfortunately, matching techniques, such as the series and parallel matching techniques that are described above, may not work well when high capacitance loads are connected to different points of the transmission line. As a result, reflections and the resultant ringing may introduce long propagation, or flight times, across the transmission lines, especially when the transmission line communicates a digital signal that has predefined logic zero and logic one voltage levels.
Thus, there is a continuing need for a matching technique and arrangement that accommodates one or more of the problems that are stated above.
REFERENCES:
patent: 5339459 (1994-08-01), Schiltz et al.
patent: 5686872 (1997-11-01), Fried et al.
patent: 5869984 (1999-02-01), Eto
patent: 6066973 (2000-05-01), Sekino et al.
patent: 6100713 (2000-08-01), Kalb et al.
Bawolek Edward J.
Doyle James T.
Shrivastava Udbhava A.
Intel Corporation
Le Don Phu
Tokar Michael
Trop Pruner & Hu P.C.
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