LandOfFree - US Patents - Listing for Electronic digital logic circuitry

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Method of reducing sub-threshold leakage in circuits during...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

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Method of reducing the number of configuration bits by...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Method of synchronizing computing units connected to one another

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Patent

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Method of time multiplexing a programmable logic device

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Patent

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Method of transparently reducing power consumption of a...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

Reexamination Certificate

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Method of transparently reducing power consumption of a...

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Method of use with a terminator and network

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Method of using partially defective programmable logic devices

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Method to improve current and slew rate ratio of off-chip...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Method to improve routability in programmable logic devices...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Method to reduce power consumption within a clock gated...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Reexamination Certificate

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Method to reduce power in active shield circuits that use...

Electronic digital logic circuitry – Security

Reexamination Certificate

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Method to reduce wire-or glitch in high performance bus...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Method utilizing a one-stage level shift circuit

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Method, apparatus and system of domino multiplexing

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method, apparatus, and system for synchronously resetting...

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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Method, architecture and circuit for product term allocation

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Method, system and method of using a component for setting...

Electronic digital logic circuitry – Multifunctional or programmable

Reexamination Certificate

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Methodology and apparatus for reduction of soft errors in...

Electronic digital logic circuitry – Reliability – Parasitic prevention in integrated circuit structure

Reexamination Certificate

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Methodology to test pulsed logic circuits in pseudo-static mode

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Patent

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