Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Patent
1999-06-08
2000-12-05
Nelms, David
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
710129, H03K 1900
Patent
active
061572179
ABSTRACT:
Computing units that are connected to one another via a bus system are synchronized in that two master units each cyclically output a time signal onto a data line of the bus system. The time signals are received by the computing unit to be synchronized. The unit checks the time signals with reference to its own time base. Particularly reliable synchronization of the computing units is ensured by this means.
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Pfaffeneder Bernd
Zittlau Dirk
Auduong Gene N.
Greenberg Laurence A.
Lerner Herbert L.
Nelms David
Siemens Aktiengesellschaft
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