Method, apparatus, and system for synchronously resetting...

Details Method, apparatus, and system for synchronously resetting... Method, apparatus, and system for synchronously resetting...

2005-09-16

2009-12-01

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C326S093000, C326S094000, C326S095000, C326S096000, C326S097000, C326S098000, C326S037000, C326S038000

Reexamination Certificate

active

07626420

ABSTRACT:
An apparatus, system, and method are described for synchronously resetting logic circuits. A synchronous reset signal is coupled to at least one asynchronous reset input for synchronously resetting sequential logic. In one embodiment, reset logic generates a signal coupled to the at least one asynchronous reset input of the sequential logic to synchronously reset the sequential logic.

REFERENCES:
patent: 5331669 (1994-07-01), Wang et al.
patent: 5646553 (1997-07-01), Mitchell et al.
patent: 6586969 (2003-07-01), Koe
patent: 7026849 (2006-04-01), Ichikawa
patent: 2005/0036577 (2005-02-01), Sweet

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