Large crossbar switch implemented in FPGA
Large crossbar switch implemented in FPGA
Latency measurements for wireless communications
Layout architecture and method for fabricating PLDs including mu
Layout design of integrated circuit, especially datapath circuit
Level converter including wave-shaping circuit and emulator micr
Level-restoring buffers for programmable interconnect...
Library group and semiconductor integrated circuit structured th
Line segmentation in programmable logic devices having...
Line segmentation in programmable logic devices having...
Loadable up-down counter with asynchronous reset
Logic array circuits using silicon-on-insulator logic
Logic array devices having complex macro-cell architecture...
Logic array having high frequency internal clocking
Logic array having interleaved logic planes
Logic array having multi-level logic planes
Logic basic cell
Logic block control architectures for programmable logic...
Logic block control architectures for programmable logic...
Logic block used as dynamically configurable logic function