Logic array having high frequency internal clocking

Details Logic array having high frequency internal clocking Logic array having high frequency internal clocking

1995-04-19

1998-05-19

Wambach, Margaret Rose

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 41, 326 96, 327157, 327298, H03K 738

Patent

active

RE0357979

ABSTRACT:
A state machine is configured with a phase-locked loop clock signal generator which can operate at a rate faster than an externally generated reference clock signal applied to the phase-locked loop. The output of the phase-locked loop is used to trigger registers coupled to the state machine at a selected rate to enable signals at output terminals of the state machine to be updated at a rate different than the rate of the externally generated reference clock signal.

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