Logic array having interleaved logic planes

Details Logic array having interleaved logic planes Logic array having interleaved logic planes

1997-12-09

1999-11-02

Toker, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 47, 326102, 326101, H01L 2500, H03K 19177

Patent

active

059777940

ABSTRACT:
A logic array includes a first logic plane, a second logic plane, and a third logic plane. The first logic plane has a first plurality of intermediate outputs, and the second logic plane has a second plurality of intermediate outputs. The third logic plane has first and second opposing sides and is adapted to receive the first and second pluralities of intermediate outputs. The first plurality of intermediate outputs intersect the third logic plane through the first side, and the second plurality of intermediate outputs intersect the third logic plane through the second side. A method for increasing the density of a logic array includes providing a first logic plane, a second logic plane, and a third logic plane. The first logic plane has a first plurality of intermediate outputs, and the second logic plane has a second plurality of intermediate outputs. The first plurality of intermediate outputs and the second plurality of intermediate outputs are interleaved in the third logic plane.

REFERENCES:
patent: 4982114 (1991-01-01), Nakamura et al.
patent: 5010258 (1991-04-01), Usami et al.
patent: 5323069 (1994-06-01), Smith, Jr.
patent: 5497107 (1996-03-01), Szczepanek
patent: 5572198 (1996-11-01), Sturges
patent: 5811988 (1998-09-01), Ditlow et al.

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