Layout design of integrated circuit, especially datapath circuit

Details Layout design of integrated circuit, especially datapath circuit Layout design of integrated circuit, especially datapath circuit

1996-11-15

2000-02-29

Teska, Kevin J.

Electronic digital logic circuitry

Multifunctional or programmable

Array

39550018, 39550019, 326 38, 326 39, 438129, 257208, G06F 1750, H01L 2710

Patent

active

060319828

ABSTRACT:
A group of function cells (e.g., 40), each created from one or more implementations of a fixed basic cell (20), are utilized in designing a layout for at least part of an integrated circuit. Each basic cell implementation contains a plurality of unconnected transistors (Q1-Q10) arranged in a transistor pattern identical to, or a mirror image of, the transistor pattern in each other basic cell implementation. Transistors of a specified polarity type in each basic cell implementation are normally of two or more different current-carrying capabilities. Each function cell has an interconnection network (42-44) for electrically interconnecting transistors in that function cell to perform a specified electronic function. The function cells typically form a cell library from which certain function cells are selected for generating the layout. The present layout technique is particularly applicable to laying out datapath circuitry (90) in an integrated circuit.

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