Macro cell signal selector and semiconductor integrated circuit
Macrocell architecture with high speed product terms
Macrocell comprised of two look-up tables and two flip-flops
Macrocell for data processing circuit
Macrocell having a dual purpose input register for use in a logi
Macrocell with product-term cascade and improved flip flop utili
Mapping of gate arrays
Mask registor for a configurable cellular array
Mask-programmable logic device with programmable portions
Mask-programmable logic device with programmable portions
Mask-programmable logic device with programmable portions
Match register with duplicate decoders
Measuring input setup and hold time using an input-output...
Memory access via serial memory interface
Memory array with hard and soft decoders
Memory bits used to couple look up table inputs to facilitate in
Memory cell data line equalization controlling circuit for semic
Memory in a programmable logic device
Memory mapping method and apparatus to fold sparsely populated s
Memory utilizing oxide nanolaminates