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Duty cycle distortion compensation for the data output of a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Duty cycle rejecting serializing multiplexer for output data...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Dynamic programmable delay selection circuit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic programmable delay selection circuit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic resynchronization of clocked interfaces

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Dynamic wave-pipelined interface apparatus and methods therefor

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Efficient variably-channelized SONET multiplexer and payload...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Elastic store circuit with vernier clock delay

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Electronic circuit with asynchronous clocking of peripheral...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Electronic circuit with asynchronous clocking of peripheral...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Elimination of turnaround cycles on multiplexed address/data...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Embedded system for compensating setup time violation and...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Emulation circuit with a hold time algorithm, logic analyzer...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Fast data access mode in a memory device

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Fast data access mode in a memory device

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Fast re-synchronization of independent domain clocks after...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Fast synchronization of a number of digital clocks

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Fast synchronization of a number of digital clocks

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Fault tolerant computer

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Fixed latency data computation and chip crossing circuits...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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