Race free and technology independent flag generating circuitry a
Rate verification of an incoming serial alignment sequence
Real time clock synchronization in a telecommunications network
Real time synchronization in multi-threaded computer systems
Reduced bus turnaround time in a multiprocessor architecture
Reduced GMII with internal timing compensation
Reducing timing variance of signals from an electronic device
Redundant oscillator distribution in a multi-processor...
Redundant, synchronous central timing systems with constant...
Register capable of corresponding to wide frequency band and...
Rescheduling data input and output commands for bus...