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Maintaining synchronization of multiple data channels with a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Measure controlled delay with duty cycle control

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Measure controlled delay with duty cycle control

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Measure controlled delay with duty cycle control

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Mechanism for windaging of a double rate driver

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Media data synchronization in a wireless network

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Memory bus shared system

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Memory controller and signal synchronizing method thereof

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory controller driver circuitry having a multiplexing...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory controller for controlling an integrated memory...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Memory controller with buffered CAS/RAS external synchronization

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Memory device controls delay time of data input buffer in...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory device outputting read data in a time starting from a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Memory system and data transmission method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory system and data transmission method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory system using complementary delay elements to reduce...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Memory system, module and register

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Method and a related circuit for adjusting the duration of a...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Method and a system for synchronising respective state...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Method and an apparatus for adjusting clock signal to sample...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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