Embedded system for compensating setup time violation and...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses

Reexamination Certificate

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Details

C713S401000, C713S500000, C711S103000, C711S167000

Reexamination Certificate

active

07831854

ABSTRACT:
The invention relates to an embedded system, and in particular, to an embedded system capable of compensating setup time violation. An embedded system comprises a serial flash and an access circuit. The serial flash further comprises an input pin and an output pin. The access circuit further comprises a processor, a shift register, a serial flash controller, and a time compensator. The input pin receives an adjusted input signal and the output pin sends an output signal. The processor controls the operation of the access circuit. The serial flash controller enables an operational clock of the access circuit. The time compensator compensates a timing of the output signal by referring to the operational clock. The shift register converts data in parallel form to serial form.

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patent: 1399180 (2003-02-01), None
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patent: 586118 (2004-05-01), None
CN office action mailed Mar. 3, 2008.
English Abstract for TW586118, May 1, 2004.
English Abstract for KR20030058851, Jul. 7, 2003.

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