Measure controlled delay with duty cycle control

Details Measure controlled delay with duty cycle control Measure controlled delay with duty cycle control

2008-07-08

2008-07-08

Patel, Nitin C. (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

C713S401000, C713S500000, C713S503000, C327S141000, C327S151000, C327S153000, C327S160000, C388S825000, C388S831000, C388S832000, C388S858000, C700S296000

Reexamination Certificate

active

07398412

ABSTRACT:
The disclosed embodiments relate to circuits that produce synchronized output signals. More specifically, there is provided a synchronization circuit adapted to receive an input signal, the synchronization circuit comprising a delay monitor adapted to produce a delayed input signal, a counter adapted to determine a difference between the input signal and the delayed input signal and produce a coarse timing signal in response thereto, a circuit adapted to produce a fine timing signal based on the input signal, and a circuit adapted to combine the coarse timing signal and the fine timing signal to produce an output signal.

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