Measure controlled delay with duty cycle control

Details Measure controlled delay with duty cycle control Measure controlled delay with duty cycle control

2006-04-11

2006-04-11

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

C711S104000, C711S167000

Reexamination Certificate

active

07028207

ABSTRACT:
The disclosed embodiments relate to circuits that produce synchronized output signals. An input signal is received and used to produce a delayed input signal. The period of the input signal and the phase difference between the input signal and the delayed input signal are measured. The period of the input signal and the phase difference between the input signal and the delayed input signal are used to construct an output signal.

REFERENCES:
patent: 5306971 (1994-04-01), McCune
patent: 6323705 (2001-11-01), Shieh et al.
patent: 6380800 (2002-04-01), Huber
patent: 6687629 (2004-02-01), Yamaguchi et al.

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