4. Electrical computers and digital processing systems: support
  5. Synchronization of clock or timing signals, data, or pulses
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Multi-link receiver and method for processing multiple data...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate

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Multi-link receiver mechanism for processing multiple data...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Reexamination Certificate

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Multi-mode buffer for digital signal processor

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
Patent

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Multi-output monolithic device without generating simultaneous s

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Multiple internal phase-locked loops for synchronization of chip

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Patent

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Multiprocessor clock synchronization with adjustment based...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Multiprocessor system with interactive synchronization of...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
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Multiprotocol computer bus interface adapter and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Multistage clock delay circuit and method

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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