Determining the timing of a data signal
Device and method for characterizing signal skew
Digital clock skew detection and phase alignment
Digital frequency correction
DRAM interface circuits that support fast deskew calibration...
DS3 Desynchronizer with a module for providing uniformly...
Dynamic slew rate control output buffer
Fractional phase interpolation of ring oscillator for high resol
Guaranteeing clock slew correction in point-to-point...
Hardware coordination of power management activities
Jitter reduction circuit
Jitter tolerant delay-locked loop circuit
Measuring timing margins in digital systems by varying a...
Memory device for compensating for a clock skew causing a...
Memory device signaling system and method with independent...
Memory device signaling system and method with independent...
Memory system that sets a predetermined phase relationship...
Method and apparatus for controlling and normalizing the...
Method and apparatus for de-skewing a clock using a first...
Method and apparatus for deskewing multiple incoming signals