Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Patent
1998-06-01
1999-12-28
Heckler, Thomas M.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
331107R, G06F 100
Patent
active
060095342
ABSTRACT:
The present invention includes a fractional interpretation circuit to be used to correct pre-write compensation for writing data on a disk. The present invention need not be limited to a three phase interpreter but could easily be extended to a 4X or 5X. This could simply be implemented by adding additional current paths from the capacitors to ground in order to incrementally change the slew rate and consequently the phase interpretation.
REFERENCES:
patent: 3911368 (1975-10-01), Tarczy-Hornoch
patent: 5594675 (1997-01-01), Peng
patent: 5644514 (1997-07-01), Abo et al.
Chiu Kar-Shing
Leung Ming-Tak
Brady III Wade James
Donaldson Richard L.
Heckler Thomas M.
Swayze, Jr. W. Daniel
Texas Instruments Incorporated
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