Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Patent
1998-04-16
1999-11-23
Heckler, Thomas M.
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
713401, 39550007, 702117, G06F 1100
Patent
active
059918900
ABSTRACT:
A device and method for characterizing signal skew between a first signal and a second signal. The device includes a delay chain and a first transition detector in communication with the delay chain. The first transition detector is configured for receiving the first signal and provides a pulse signal to the delay chain upon detecting a transition of the first signal. The device includes a second transition detector which is in communication with a latch and is configured for receiving the second signal. The second transition detector sets the latch upon detecting a transition of the second signal. At least one pass gate is connected to the delay chain and the latch. At least one timing latch is connected to the pass gate for receiving signal skew information between the first and second signals.
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Brown Jeff S.
Haag Gerald R.
Patel Hiren R.
Heckler Thomas M.
LSI Logic Corporation
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