Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Correction for skew – phase – or rate
Reexamination Certificate
2000-08-16
2004-07-20
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Correction for skew, phase, or rate
C713S502000
Reexamination Certificate
active
06766463
ABSTRACT:
BACKGROUND
Processes typically tend to run at different speeds on different machines due to the differences in performance between varying computer platforms and configurations. Often, a program that is running too fast may be as useless as a program that is running too slowly, especially when the process displays information that is continually updated and must be interpreted by a user, for example the real-time display of data. Thus, there lies a need for a method and system that allows a program to optimize its speed accordingly so that performance is normalized across multiple computer platforms.
SUMMARY
The present invention is directed to a method and system that allows a process to appear to be running at a normalized speed independent of the computer platform, configuration, and processor or bus speed. A hidden process gathers and processes data in a manner that is normally not visible to the user. A visual process displays the results of the hidden process in a way that is visible or detectable by a user. An optimal rate for which the visible process is desired to be updated is determined. The hidden process is executed a predetermined number of times, and the visible process is executed once to complete a cycle. The time required to complete the cycle is determined, and an updated value for the number of times to execute the hidden process is calculated. The hidden process is executed a number of times equal to the updated value in a subsequent cycle. The method continues so that the visual process is executed at a normalized interval based upon the number of times that the hidden process executes per refresh, which in turn is a function of the platform speed.
REFERENCES:
patent: 6097399 (2000-08-01), Bhatt et al.
patent: 6181300 (2001-01-01), Poon et al.
patent: 6417855 (2002-07-01), Yonts
patent: 6442509 (2002-08-01), Kokko
patent: 11282819 (1999-10-01), None
“Setting Viewability of Information in a Virtual World”, IBM Technical Disclosure Bulletin, Mar. 1, 1997, US, pp. 217-218.
Lee Thomas
LSI Logic Corporation
Suiter - West PC LLO
Yanchus, III Paul
LandOfFree
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