Heterogeneous multi-processor reference design
Heterogeneous parallel multithread processor (HPMT) with...
Hierarchical connection of plurality of functional units...
Hierarchical interconnect for configuring separate...
High and low power dual CPU cardiograph data processing...
High data density RISC processor
High frequency pipeline decoupling queue with non-overlapping re
High instruction fetch bandwidth in multithread processor...
High performance adder for multiple parallel add operations
High performance microprocessor having variable speed system...
High performance RISC instruction set digital signal...
High performance RISC instruction set digital signal...
High performance superscalar alignment unit
High performance, superscalar-based computer system with out-of-
High performance, superscalar-based computer system with out-of-
High performance, superscalar-based computer system with...
High priority guard transfer for execution control of...
High speed multi-threaded reduced instruction set computer...
High speed register file organization for a pipelined computer a
High speed, scalable microcode based instruction decoder for pro