Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2008-07-15
2008-07-15
Fleming, Fritz (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S241000
Reexamination Certificate
active
07401205
ABSTRACT:
A DSP superscalar architecture employing dual multiply accumulate pipelines. Dual MAC pipelines allow for a seem less transition between established RISC instruction sets and extended DSP instructions sets. Relocatable opcodes are provide to allow further extensions of RISC instruction sets. The DSP superscalar architecture also provides memory pointers with hardware circular buffer support, an interruptible and nested zero-overhead loop counter, and prioritized low-overhead interrupts.
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Dally William J.
Ericsson Staffan
Gelinas Robert
Hays W. Patrick
Katzman Sol
Fleming Fritz
MIPS Technologies Inc.
Moll Jesse R.
Sterne Kessler Goldstein & Fox PLLC
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