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Decode mode for an auxiliary processor unit controller in...

Electrical computers and digital processing systems: processing – Instruction decoding

Reexamination Certificate

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Decoder interface

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...

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Decoder interface

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...

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Decoding an instruction portion and forwarding part of the...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...

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Decoding instructions for trace cache resume state in system...

Electrical computers and digital processing systems: processing – Instruction issuing

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Decoding next instruction of different length without length...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...

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Decoding operands for multimedia applications instruction coded

Electrical computers and digital processing systems: processing – Instruction decoding

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Decoding predication instructions within a superscaler data...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

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Decoding suffix instruction specifying replacement...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

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Decomposition of instructions into branch and sequential...

Electrical computers and digital processing systems: processing – Processing control – Generating next microinstruction address

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Decompression bit processing with a general purpose...

Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...

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Decoupled fetch-execute engine with static branch prediction...

Electrical computers and digital processing systems: processing – Processing control – Branching

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Deferred branch history update scheme

Electrical computers and digital processing systems: processing – Processing control – Branching

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Deferring loads and stores when a load buffer or store...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Delay slot handling in a processor

Electrical computers and digital processing systems: processing – Instruction issuing

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Delay-slot control mechanism for microprocessors

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble

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Delayed deallocation of an arithmetic flags register

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

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Delayed update register for an array

Electrical computers and digital processing systems: processing – Processing control – Branching

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Dependence-chain processing using trace descriptors having...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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Dependence-chain processing using trace descriptors having...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

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